Invention Grant
- Patent Title: Integrated circuit package and method
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Application No.: US17884096Application Date: 2022-08-09
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Publication No.: US11855067B2Publication Date: 2023-12-26
- Inventor: Chen-Hua Yu , Yung-Chi Lin , Wen-Chih Chiou
- Applicant: Taiwan Semiconductor Manufacturing Co., Ltd.
- Applicant Address: TW Hsinchu
- Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
- Current Assignee Address: TW Hsinchu
- Agency: Slater Matsil, LLP
- Main IPC: H01L25/00
- IPC: H01L25/00 ; H01L25/18 ; H01L23/00 ; H01L25/065

Abstract:
A device package includes a first die directly bonded to a second die at an interface, wherein the interface comprises a conductor-to-conductor bond. The device package further includes an encapsulant surrounding the first die and the second die and a plurality of through vias extending through the encapsulant. The plurality of through vias are disposed adjacent the first die and the second die. The device package further includes a plurality of thermal vias extending through the encapsulant and a redistribution structure electrically connected to the first die, the second die, and the plurality of through vias. The plurality of thermal vias is disposed on a surface of the second die and adjacent the first die.
Public/Granted literature
- US20220392884A1 Integrated Circuit Package and Method Public/Granted day:2022-12-08
Information query
IPC分类: