Read disturb audit techniques that include algorithmically applying audit verify voltages to erased wordlines in an open memory block are described. In an audit verify technique, a pass-through voltage ensured to be higher than any threshold voltage of any cell is applied to each wordline in an open memory block that includes one or more programmed memory cells, and an audit verify voltage lower than the pass-through voltage is applied to each erased wordline. A first bit count representing a number of non-conductive bitline(s) is determined and compared to a threshold value to determine whether to continue or discontinue block operation. In an audit verify and audit gap technique, the erased wordlines are divided into disjoint first and second groups, and an audit verify voltage and a non-verify voltage are alternatively applied to the groups in different audit verify stages.