Invention Grant
- Patent Title: Bus-off attack prevention circuit
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Application No.: US17529020Application Date: 2021-11-17
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Publication No.: US11863569B2Publication Date: 2024-01-02
- Inventor: Marcio Rogerio Juliato , Shabbir Ahmed , Santosh Ghosh , Christopher Gutierrez , Manoj R. Sastry
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: INTEL CORPORATION
- Current Assignee: INTEL CORPORATION
- Current Assignee Address: US CA Santa Clara
- Agency: JAFFERY WATSON MENDONSA & HAMILTON LLP
- Main IPC: H04L29/06
- IPC: H04L29/06 ; H04L12/40 ; H04L9/40

Abstract:
Various systems and methods for bus-off attack detection are described herein. An electronic device for bus-off attack detection and prevention includes bus-off prevention circuitry coupled to a protected node on a bus, the bus-off prevention circuitry to: detect a transmitted message from the protected node to the bus; detect a bit mismatch of the transmitted message on the bus; suspend further transmissions from the protected node while the bus is analyzed; determine whether the bit mismatch represents a bus fault or an active attack against the protected node; and signal the protected node indicating whether a fault has occurred.
Public/Granted literature
- US20220078201A1 BUS-OFF ATTACK PREVENTION CIRCUIT Public/Granted day:2022-03-10
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