- 专利标题: Compacted addressing for transaction layer packets
-
申请号: US16937189申请日: 2020-07-23
-
公开(公告)号: US11868778B2公开(公告)日: 2024-01-09
- 发明人: Ganesh Dasika , Sergey Blagodurov , Seyedmohammad Seyedzadehdelcheh
- 申请人: ADVANCED MICRO DEVICES, INC.
- 申请人地址: US CA Santa Clara
- 专利权人: ADVANCED MICRO DEVICES, INC.
- 当前专利权人: ADVANCED MICRO DEVICES, INC.
- 当前专利权人地址: US CA Santa Clara
- 主分类号: G06F9/34
- IPC分类号: G06F9/34 ; G06F9/30 ; G06F13/16
摘要:
Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.
公开/授权文献
- US20220027158A1 COMPACTED ADDRESSING FOR TRANSACTION LAYER PACKETS 公开/授权日:2022-01-27
信息查询