- 专利标题: Multiplexing sample-and-hold circuit
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申请号: US18155961申请日: 2023-01-18
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公开(公告)号: US11881851B1公开(公告)日: 2024-01-23
- 发明人: Chan-Tang Tsen , Donald Hitko , Susan Morton
- 申请人: HRL Laboratories, LLC
- 申请人地址: US CA Malibu
- 专利权人: HRL LABORATORIES, LLC
- 当前专利权人: HRL LABORATORIES, LLC
- 当前专利权人地址: US CA Malibu
- 代理机构: Lewis Roca Rothgerber Christie LLP
- 主分类号: H03K17/687
- IPC分类号: H03K17/687 ; H03K19/20 ; H03F3/45
摘要:
A signal processing circuit. In some embodiments, the signal processing circuit includes a first sample and hold circuit and a second sample and hold circuit. The first sample and hold circuit may include: a hold capacitor; an input switch connected between a common input node and the hold capacitor; a signal path amplifier having an input connected to the hold capacitor; and an output switch connected between an output of the signal path amplifier and a common output node. An input of a voltage feedback amplifier may be connected to the hold capacitor, and an output of the voltage feedback amplifier may be operatively coupled to an internal node of the input switch.
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