Invention Grant
- Patent Title: Ultra-high-speed PAM-N CMOS inverter serial link
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Application No.: US17873002Application Date: 2022-07-25
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Publication No.: US11894959B2Publication Date: 2024-02-06
- Inventor: Ronan Sean Casey , Lokesh Rajendran , Declan Carey , Kevin Zheng , Catherine Hearne , Hongtao Zhang
- Applicant: XILINX, INC.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H04L25/49
- IPC: H04L25/49 ; H04L27/04

Abstract:
Methods, systems, and apparatus described herein make a multi-level PAM signal (PAM-N signal) at a transmitter using CMOS-based components. By forming the PAM-N signal at the transmitter, receivers do not have to recombine and/or realign multiple signals and only employs a single transmission line channel (or two transmission line channels in differential implementations) to convey the data stream to the receiver from the transmitter.
Public/Granted literature
- US20230089431A1 ULTRA-HIGH-SPEED PAM-N CMOS INVERTER SERIAL LINK Public/Granted day:2023-03-23
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