- 专利标题: Manufacturing method of semiconductor package
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申请号: US17506706申请日: 2021-10-21
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公开(公告)号: US11901344B2公开(公告)日: 2024-02-13
- 发明人: Shing-Yih Shih
- 申请人: NANYA TECHNOLOGY CORPORATION
- 申请人地址: TW New Taipei
- 专利权人: NANYA TECHNOLOGY CORPORATION
- 当前专利权人: NANYA TECHNOLOGY CORPORATION
- 当前专利权人地址: TW New Taipei
- 代理机构: JCIPRNET
- 分案原申请号: US16264711 2019.02.01
- 主分类号: H01L23/49
- IPC分类号: H01L23/49 ; H01L25/10 ; H01L23/48 ; H01L23/31 ; H01L23/498 ; H01L25/00 ; H01L21/56 ; H01L21/48 ; H01L23/538
摘要:
A manufacturing method of a semiconductor package is provided as follows. A semiconductor die is provided, wherein the semiconductor die comprises a semiconductor substrate, an interconnection layer and a through semiconductor via, the interconnection layer is disposed on an active surface of the semiconductor substrate, the through semiconductor via penetrates the semiconductor substrate from a back surface of the semiconductor substrate to the active surface of the semiconductor substrate. An encapsulant is provided to laterally encapsulate the semiconductor die. A through encapsulant via penetrating through the encapsulant is formed.
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