Invention Grant
- Patent Title: Semiconductor device having tapered metal coated sidewalls
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Application No.: US17139417Application Date: 2020-12-31
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Publication No.: US11923320B2Publication Date: 2024-03-05
- Inventor: Tomoko Noguchi , Mutsumi Masumoto , Kengo Aoya , Masamitsu Matsuura
- Applicant: Texas Instruments Incorporated
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Dawn Jos; Frank D. Cimino
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/56 ; H01L21/683 ; H01L23/00 ; H01L23/31 ; H01L23/498 ; H01L23/552

Abstract:
A semiconductor device includes a semiconductor die having a top side surface comprising a semiconductor material including circuitry therein having bond pads connected to nodes in the circuitry, a bottom side surface, and sidewall surfaces between the top side surface and the bottom side surface. A metal coating layer including a bottom side metal layer is over the bottom side surface that extends continuously to a sidewall metal layer on the sidewall surfaces. The sidewall metal layer defines a sidewall plane that is at an angle from 10° to 60° relative to a normal projected from a bottom plane defined by the bottom side metal layer.
Public/Granted literature
- US20220208689A1 SEMICONDUCTOR DEVICE HAVING TAPERED METAL COATED SIDEWALLS Public/Granted day:2022-06-30
Information query
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