Invention Grant
- Patent Title: Memory arrays and methods used in forming a memory array comprising strings of memory cells
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Application No.: US17315727Application Date: 2021-05-10
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Publication No.: US11996151B2Publication Date: 2024-05-28
- Inventor: Jordan D. Greenlee , John D. Hopkins , Andrew Li , Alyssa N. Scarbrough
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H10B41/27
- IPC: H10B41/27 ; G11C16/04 ; H01L29/161 ; H10B41/10 ; H10B41/35 ; H10B43/10 ; H10B43/27 ; H10B43/35

Abstract:
A memory array comprising laterally-spaced memory blocks individually comprises a vertical stack comprising alternating insulative tiers and conductive tiers. Channel-material strings of memory cells extend through the insulative tiers and the conductive tiers. The laterally-spaced memory blocks in a lower one of the conductive tiers comprises elemental-form metal that extends longitudinally-along the laterally-spaced memory blocks proximate laterally-outer sides of the laterally-spaced memory blocks. A metal silicide or a metal-germanium compound is directly against laterally-inner sides of the elemental-form metal in the lower conductive tier and that extends longitudinally-along the laterally-spaced memory blocks in the lower conductive tier. The metal of the metal silicide or of the metal-germanium compound is the same as that of the elemental-form metal. Other embodiments, including method, are disclosed.
Public/Granted literature
- US20220359012A1 Memory Arrays And Methods Used In Forming A Memory Array Comprising Strings Of Memory Cells Public/Granted day:2022-11-10
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