Invention Grant
- Patent Title: System decoder for training accelerators
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Application No.: US17973268Application Date: 2022-10-25
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Publication No.: US12038861B2Publication Date: 2024-07-16
- Inventor: Francesc Guim Bernat , Da-Ming Chiang , Kshitij A. Doshi , Suraj Prabhakaran , Mark A. Schmisseur
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Essential Patents Group, LLP
- Agent Christopher K. Gagne
- Main IPC: G06F13/40
- IPC: G06F13/40 ; G06F9/455 ; G06F9/50 ; G06F9/54 ; G06F13/362 ; G06F13/42 ; G06N3/02 ; G06N3/04 ; G06N3/045 ; G06N3/08

Abstract:
There is disclosed an example of an artificial intelligence (AI) system, including: a first hardware platform; a fabric interface configured to communicatively couple the first hardware platform to a second hardware platform; a processor hosted on the first hardware platform and programmed to operate on an AI problem; and a first training accelerator, including: an accelerator hardware; a platform inter-chip link (ICL) configured to communicatively couple the first training accelerator to a second training accelerator on the first hardware platform without aid of the processor; a fabric ICL to communicatively couple the first training accelerator to a third training accelerator on a second hardware platform without aid of the processor; and a system decoder configured to operate the fabric ICL and platform ICL to share data of the accelerator hardware between the first training accelerator and second and third training accelerators without aid of the processor.
Public/Granted literature
- US20230039631A1 SYSTEM DECODER FOR TRAINING ACCELERATORS Public/Granted day:2023-02-09
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