Invention Grant
- Patent Title: Method and device for reducing metal burrs when sawing semiconductor packages
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Application No.: US18309951Application Date: 2023-05-01
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Publication No.: US12046564B2Publication Date: 2024-07-23
- Inventor: HunTeak Lee , Deokkyung Yang , HeeSoo Lee
- Applicant: STATS ChipPAC Pte. Ltd.
- Applicant Address: SG Singapore
- Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee: STATS ChipPAC Pte. Ltd.
- Current Assignee Address: SG Singapore
- Agency: PATENT LAW GROUP: Atkins and Associates, P.C.
- Agent Brian M. Kaufman; Robert D. Atkins
- The original application number of the division: US16181619 2018.11.06
- Main IPC: H01L23/552
- IPC: H01L23/552 ; H01L21/56 ; H01L21/78 ; H01L23/00 ; H01L23/31

Abstract:
A semiconductor device has a substrate. A conductive layer is formed over the substrate and includes a ground plane. A first tab of the conductive layer extends from the ground plane and less than half-way across a saw street of the substrate. A shape of the first tab can include elliptical, triangular, parallelogram, or rectangular portions, or any combination thereof. An encapsulant is deposited over the substrate. The encapsulant and substrate are singulated through the saw street. An electromagnetic interference (EMI) shielding layer is formed over the encapsulant. The EMI shielding layer contacts the first tab of the conductive layer.
Public/Granted literature
- US20230268289A1 Method and Device for Reducing Metal Burrs When Sawing Semiconductor Packages Public/Granted day:2023-08-24
Information query
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