Invention Grant
- Patent Title: Memory system and method for managing number of read operations using two counters
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Application No.: US18318078Application Date: 2023-05-16
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Publication No.: US12050812B2Publication Date: 2024-07-30
- Inventor: Suguru Nishikawa , Yoshihisa Kojima , Takehiko Amaki
- Applicant: Kioxia Corporation
- Applicant Address: JP Tokyo
- Assignee: KIOXIA CORPORATION
- Current Assignee: KIOXIA CORPORATION
- Current Assignee Address: JP Tokyo
- Agency: Foley & Lardner LLP
- Priority: JP 19196427 2019.10.29
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F3/06 ; G11C16/04 ; G11C16/26 ; G11C16/34 ; G11C11/56

Abstract:
A memory system includes a memory device having a memory cell array, and a controller. The memory cell array includes a plurality of first units and at least one second unit. The second unit includes the plurality of first units. The controller counts a first number of times of read operation for each of the plurality of first units, and, in response to the first number of times for one first unit among the plurality of first units reaching a first value, updates a second number of times for the second unit that includes the one first unit. In response to the second number of times reaching a second value, the controller determines whether to rewrite data stored in at least one of the first units included in the second unit.
Public/Granted literature
- US20230280943A1 MEMORY SYSTEM MANAGING NUMBER OF READ OPERATIONS USING TWO COUNTERS Public/Granted day:2023-09-07
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