- 专利标题： Semiconductor device including a level shifter and method of mitigating a delay between input and output signals
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申请号： US18447372申请日： 2023-08-10
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公开(公告)号： US12057832B2公开(公告)日： 2024-08-06
- 发明人: Jerrin Pathrose Vareed , Shiba Mohanty
- 申请人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 申请人地址： TW Hsinchu
- 专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人： Taiwan Semiconductor Manufacturing Company, Ltd.
- 当前专利权人地址： TW Hsinchu
- 代理机构： Jones Day
- 分案原申请号： US17571690 2022.01.10
- 主分类号： H03K19/0185
- IPC分类号： H03K19/0185 ; H03K3/037
摘要：
A semiconductor device includes an input, a level shifter, an output, and a switch module. The input is configured to receive an input signal in a first voltage domain. The level shifter is connected to the input and is configured to shift the input signal from the first voltage domain to a second voltage domain. The switch module is configured to connect one of the input and the level shifter to the output. A method of mitigating a delay between input and output signals of the semiconductor device is also disclosed.
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