A nonvolatile memory device includes a memory cell array including a plurality of memory cells, and a peripheral circuit that performs a program operation of repeatedly performing a program loop. The program loop includes performing a program by applying a program voltage to memory cells selected from the plurality of memory cells, and a first verify by applying a plurality of verify voltages to the selected memory cells. The peripheral circuit completes the program operation in response to a success of the first verify, performs a second verify by applying an additional verify voltage different from the plurality of verify voltages to the selected memory cells, and determines the program operation has failed in response to a failure of the second verify.