公开(公告)号：US11508443B2

公开(公告)日：2022-11-22

申请号：US17004074

申请日：2020-08-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyu-Ha Park ,  Hyungsuk Kim

IPC: G11C16/26 ,  G11C16/16 ,  G11C16/34 ,  G11C16/24 ,  G11C16/08

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of memory cells, and a peripheral circuit that performs a program operation of repeatedly performing a program loop. The program loop includes performing a program by applying a program voltage to memory cells selected from the plurality of memory cells, and a first verify by applying a plurality of verify voltages to the selected memory cells. The peripheral circuit completes the program operation in response to a success of the first verify, performs a second verify by applying an additional verify voltage different from the plurality of verify voltages to the selected memory cells, and determines the program operation has failed in response to a failure of the second verify.

公开(公告)号：US12062398B2

公开(公告)日：2024-08-13

申请号：US18057386

申请日：2022-11-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyu-Ha Park ,  Hyungsuk Kim

IPC: G11C16/34 ,  G11C16/08 ,  G11C16/16 ,  G11C16/24 ,  G11C16/26

CPC classification number: G11C16/16 ,  G11C16/08 ,  G11C16/24 ,  G11C16/26 ,  G11C16/3459

Abstract: A nonvolatile memory device includes a memory cell array including a plurality of memory cells, and a peripheral circuit that performs a program operation of repeatedly performing a program loop. The program loop includes performing a program by applying a program voltage to memory cells selected from the plurality of memory cells, and a first verify by applying a plurality of verify voltages to the selected memory cells. The peripheral circuit completes the program operation in response to a success of the first verify, performs a second verify by applying an additional verify voltage different from the plurality of verify voltages to the selected memory cells, and determines the program operation has failed in response to a failure of the second verify.

公开(公告)号：US11967367B2

公开(公告)日：2024-04-23

申请号：US17806103

申请日：2022-06-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyu-Ha Park ,  Jeongyeol Kim ,  Nari Lee ,  Daehan Kim

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34 ,  G11C29/00 ,  G11C29/54

CPC classification number: G11C11/5628 ,  G11C11/5671 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/3459 ,  G11C29/54

Abstract: Disclosed is a nonvolatile memory device which includes a memory cell array, a row decoder circuit that selects one wordline as a target of a program operation, a page buffer circuit that stores data to be written in memory cells connected with the selected wordline in the program operation, and a pass/fail check circuit that determines a pass or a fail of the program operation. In the program operation, the pass/fail check circuit detects a first program speed of first memory cells and a second program speed of second memory cells, and determines a program fail based on the first program speed and the second program speed.

公开(公告)号：US20230110663A1

公开(公告)日：2023-04-13

申请号：US17806103

申请日：2022-06-09

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Gyu-Ha Park ,  Jeongyeol Kim ,  Nari Lee ,  Daehan Kim

IPC: G11C11/56 ,  G11C16/04 ,  G11C16/08 ,  G11C16/10 ,  G11C16/24 ,  G11C16/34 ,  G11C29/54

Abstract: Disclosed is a nonvolatile memory device which includes a memory cell array, a row decoder circuit that selects one wordline as a target of a program operation, a page buffer circuit that stores data to be written in memory cells connected with the selected wordline in the program operation, and a pass/fail check circuit that determines a pass or a fail of the program operation. In the program operation, the pass/fail check circuit detects a first program speed of first memory cells and a second program speed of second memory cells, and determines a program fail based on the first program speed and the second program speed.