Invention Grant
- Patent Title: Memory latency-aware GPU architecture
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Application No.: US17030024Application Date: 2020-09-23
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Publication No.: US12067642B2Publication Date: 2024-08-20
- Inventor: Niti Madan , Michael L. Chu , Ashwin Aji
- Applicant: ADVANCED MICRO DEVICES, INC.
- Applicant Address: US CA Santa Clara
- Assignee: Advanced Micro Devices, Inc.
- Current Assignee: Advanced Micro Devices, Inc.
- Current Assignee Address: US CA Santa Clara
- Main IPC: G06T15/00
- IPC: G06T15/00 ; G06F3/06 ; G06F9/50 ; G06T1/20 ; G06T1/60

Abstract:
One or more processing units, such as a graphics processing unit (GPU), execute an application. A resource manager selectively allocates a first memory portion or a second memory portion to the processing units based on memory access characteristics. The first memory portion has a first latency that is lower that a second latency of the second memory portion. In some cases, the memory access characteristics indicate a latency sensitivity. In some cases, hints included in corresponding program code are used to determine the memory access characteristics. The memory access characteristics can also be determined by monitoring memory access requests, measuring a cache miss rate or a row buffer miss rate for the monitored memory access requests, and determining the memory access characteristics based on the cache miss rate or the row buffer miss rate.
Public/Granted literature
- US20220092724A1 MEMORY LATENCY-AWARE GPU ARCHITECTURE Public/Granted day:2022-03-24
Information query
IPC分类:
G | 物理 |
G06 | 计算;推算或计数 |
G06T | 一般的图像数据处理或产生 |
G06T15/00 | 3D〔三维〕图像的加工 |