Invention Grant
- Patent Title: Methods of forming integrated assemblies having conductive material along sidewall surfaces of semiconductor pillars
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Application No.: US17862659Application Date: 2022-07-12
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Publication No.: US12069852B2Publication Date: 2024-08-20
- Inventor: Hong Li , Ramaswamy Ishwar Venkatanarayanan , Sanh D. Tang , Erica L. Poelstra
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Wells St. John P.S.
- Main IPC: H10B12/00
- IPC: H10B12/00 ; G11C11/402 ; H01L23/49 ; H01L23/538 ; H01L29/66 ; H01L29/78

Abstract:
Some embodiments include a method of forming an integrated assembly. A structure is provided to have conductive lines, and to have rails over the conductive lines and extending in a direction which crosses the conductive lines. Each of the rails includes pillars of semiconductor material. The rails have sidewall surfaces along spaces between the rails. The pillars have upper segments, middle segments and lower segments. First-material liners are formed along the sidewall surfaces of the rails. A second material is formed over the liners. First sections of the liners are removed to form gaps between the second material and the sidewall surfaces of the rails. Second sections of the liners remain under the gaps. Conductive material is formed within the gaps. The conductive material is configured as conductive lines which are along the middle segments of the pillars.
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