Invention Grant
- Patent Title: Method of manufacturing a semiconductor device utilzing two hard masks and two auxiliary masks to form PN junctions structure
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Application No.: US17374046Application Date: 2021-07-13
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Publication No.: US12087812B2Publication Date: 2024-09-10
- Inventor: Andreas Voerckel
- Applicant: Infineon Technologies AG
- Applicant Address: DE Neubiberg
- Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee: INFINEON TECHNOLOGIES AG
- Current Assignee Address: DE Neubiberg
- Agency: Cooper Legal Group LLC
- Priority: EP 186280 2020.07.16
- Main IPC: H01L21/761
- IPC: H01L21/761 ; H01L21/04 ; H01L21/76 ; H01L29/06 ; H01L29/16

Abstract:
In an example, a first hard mask is formed on a first surface of a semiconductor body, wherein first openings in the first hard mask expose first surface sections and second openings in the first hard mask expose second surface sections. First dopants of a first conductivity type are implanted selectively through the first openings into the semiconductor body. Second dopants of a second conductivity type are implanted selectively through the second openings into the semiconductor body. The second conductivity type is complementary to the first conductivity type. A second hard mask is formed that covers the first surface sections and the second surface sections, wherein third openings in the second hard mask expose third surface sections and fourth openings in the second hard mask expose fourth surface sections. Third dopants of the first conductivity type are implanted selectively through the third openings into the semiconductor body. Fourth dopants of the second conductivity type are implanted selectively through the fourth openings into the semiconductor body.
Public/Granted literature
- US20220020846A1 SEMICONDUCTOR DEVICE WITH COMPLEMENTARILY DOPED REGIONS AND METHOD OF MANUFACTURING Public/Granted day:2022-01-20
Information query
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