- 专利标题: High-performance capacitor packaging for next generation power electronics
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申请号: US17742690申请日: 2022-05-12
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公开(公告)号: US12100560B2公开(公告)日: 2024-09-24
- 发明人: Shajjad Chowdhury , Raj Sahu , Emre Gurpinar , Burak Ozpineci
- 申请人: UT-Battelle, LLC
- 申请人地址: US TN Oak Ridge
- 专利权人: UT-Battelle, LLC
- 当前专利权人: UT-Battelle, LLC
- 当前专利权人地址: US TN Oak Ridge
- 代理机构: Warner Norcross + Judd LLP
- 主分类号: H01G4/38
- IPC分类号: H01G4/38 ; H01G4/232 ; H05K1/16 ; H01G4/12
摘要:
A capacitor packaging having a central termination and three or more capacitors (or groups of capacitors) arranged about the central termination. The electrical flow paths between the termination and the capacitors or groups of capacitors are of substantially the same length. The capacitors or groups of capacitors may be arranged in a generally circular pattern with the termination centered on the center. The termination may include first and second terminals. The capacitors may be mounted to a printed circuit board (“PCB”) with traces on opposite surfaces of the PCB providing electrical flow paths from the terminals to opposite legs of the capacitors. The capacitor packaging may include a primary PCB with a first circular arrangement of capacitors and a secondary PCB with a second circular arrangement of capacitors. The capacitors may be sandwiched between the PCBs with the second arrangement of capacitors disposed concentrically inwardly of the first arrangement.
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