Invention Grant
- Patent Title: DMOS transistor having thick gate oxide and STI and method of fabricating
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Application No.: US17330095Application Date: 2021-05-25
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Publication No.: US12113128B2Publication Date: 2024-10-08
- Inventor: Alexei Sadovnikov , Natalia Lavrovskaya
- Applicant: TEXAS INSTRUMENTS INCORPORATED
- Applicant Address: US TX Dallas
- Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee: TEXAS INSTRUMENTS INCORPORATED
- Current Assignee Address: US TX Dallas
- Agent Ronald O. Neerings; Frank D. Cimino
- The original application number of the division: US16179445 2018.11.02
- Main IPC: H01L29/78
- IPC: H01L29/78 ; H01L21/28 ; H01L29/06 ; H01L29/423 ; H01L29/66

Abstract:
An integrated circuit chip and a method of fabricating the IC chip to include a transistor having a thick gate oxide in combination with STI. The method provides a wafer for which a source region location, a drain contact region location, an extended drain region location and a gate region location have been defined and forms an STI structure overlying the extended drain region location. After growing a gate oxide layer over the gate region location and a portion of the extended drain region location, the method forms a gate structure on the gate oxide layer, the gate structure having a gap overlying the intersection of an edge of the STI structure with the gate oxide layer.
Public/Granted literature
- US20210280714A1 DMOS TRANSISTOR HAVING THICK GATE OXIDE AND STI AND METHOD OF FABRICATING Public/Granted day:2021-09-09
Information query
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