A semiconductor device assembly (10) includes a multi-layer printed circuit board (PCB—40), a thermoelectric cooler (TEC—30), a chip (22), and packaged integrated circuitry (IC—26). The multi-layer PCB includes a lateral heat conducting path (60) formed in a recessed area (44) of the PCB. The TEC and the chip are disposed on the PCB, side-by-side to one another over the lateral heat conducting path. The TEC is configured to evacuate heat from the chip via the lateral heat conducting path, and to dissipate the evacuated heat via a first end of a heat sink (33) in thermal contact with the TEC. The packaged IC is disposed on an un-recessed area of the PCB, wherein the packaged IC is configured to dissipate heat via a second end of the heat sink that is in thermal contact with the packaged IC.