A 3D memory device, the device including: a first vertical pillar, the first vertical pillar includes a transistor source; a second vertical pillar, the second vertical pillar includes the transistor drain, where the first vertical pillar and the second vertical pillar each functions as a source or functions as a drain for a plurality of overlaying horizontally-oriented memory transistors, where at least of one of the plurality of overlaying horizontally-oriented memory transistors is disposed between the first vertical pillar and the second vertical pillar, where the plurality of overlaying horizontally-oriented memory transistors are self-aligned being formed following a same lithography step, and where the first vertical pillar includes metal.