Invention Grant
- Patent Title: Chip package with near-die integrated passive device
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Application No.: US17669252Application Date: 2022-02-10
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Publication No.: US12136613B2Publication Date: 2024-11-05
- Inventor: Li-Sheng Weng , Suresh Ramalingam , Hong Shi
- Applicant: XILINX, INC.
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agency: Patterson + Sheridan, LLP
- Main IPC: H01L23/00
- IPC: H01L23/00 ; H01L25/16

Abstract:
A chip package and method for fabricating the same are provided that includes a near-die integrated passive device. The near-die integrated passive device is disposed between a package substrate and an integrated circuit die of a chip package. Some non-exhaustive examples of an integrated passive device that may be disposed between the package substrate and the integrated circuit die include a resistor, a capacitor, an inductor, a coil, a balum, or an impedance matching element, among others.
Public/Granted literature
- US20230253380A1 CHIP PACKAGE WITH NEAR-DIE INTEGRATED PASSIVE DEVICE Public/Granted day:2023-08-10
Information query
IPC分类: