Invention Grant
- Patent Title: Embedded bridge die with through-silicon vias
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Application No.: US18111329Application Date: 2023-02-17
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Publication No.: US12159813B2Publication Date: 2024-12-03
- Inventor: Aditya S. Vaidya , Ravindranath V. Mahajan , Digvijay A. Raorane , Paul R. Start
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Schwabe, Williamson & Wyatt, P.C.
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L21/768 ; H01L23/00 ; H01L23/49 ; H01L23/498 ; H01L23/538 ; H01L25/065 ; H01L25/16

Abstract:
An integrated circuit (IC) package comprising a-substrate having a first side and an opposing a second side, and a bridge die within the substrate. The bridge die comprises a plurality of vias extending from a first side to a second side of the bridge die. The bridge die comprises a first plurality of pads on the first side of the bridge die and a second plurality of pads on the second side. The plurality of vias interconnect ones of the first plurality of pads to ones of the second plurality of pads. The bridge die comprises an adhesive film over a layer of silicon oxide on the second side of the bridge die.
Public/Granted literature
- US20230197574A1 EMBEDDED BRIDGE WITH THROUGH-SILICON VIAS Public/Granted day:2023-06-22
Information query
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