An electronic circuit includes a cell array including memory cells each including a bistable circuit that includes first and second inverter circuits, each having a first mode characterized by there being substantially no hysteresis in transfer characteristics and a second mode characterized by there being hysteresis in the transfer characteristics, and being switchable between the first and second modes, and a control circuit configured to, after powering off a first memory cell that store data that are not required to be retained, put the bistable circuit in a remaining second memory cell into the second mode, and supply a second power supply voltage that allows the bistable circuit in the second mode to retain data and is lower than a first power supply voltage supplied to the bistable circuit when data is read and/or written, to the bistable circuit in the second memory cell while maintaining the second mode.