Invention Grant
- Patent Title: Size-efficient mitigation of latchup and latchup propagation
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Application No.: US17703092Application Date: 2022-03-24
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Publication No.: US12230629B2Publication Date: 2025-02-18
- Inventor: Terence Hook
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Current Assignee Address: US NY Armonk
- Agency: IBM Patents+ Team
- Main IPC: H01L27/085
- IPC: H01L27/085 ; H01L27/02 ; H01L27/092

Abstract:
A set of transistor elements includes a substrate of a first doping type and a first well and a second well, both of a second doping type and both formed on the substrate. The set of transistor elements also includes a first complementary transistor cell and a second complementary transistor cell. The set of transistor element also includes an anti-propagation region of the first doping type between the first well and the second well.
Public/Granted literature
- US20230317722A1 SIZE-EFFICIENT MITIGATION OF LATCHUP AND LATCHUP PROPAGATION Public/Granted day:2023-10-05
Information query
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