Invention Grant
- Patent Title: Phase locked loop assisted fast start-up apparatus and method
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Application No.: US17338497Application Date: 2021-06-03
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Publication No.: US12249997B2Publication Date: 2025-03-11
- Inventor: Somnath Kundu , Hao Luo , Brent Carlton
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: NICHOLSON DE VOS WEBSTER & ELLIOTT LLP
- Main IPC: H03L7/099
- IPC: H03L7/099

Abstract:
An apparatus and method are provided to re-configure an existing low-jitter phase locked loop (PLL) circuit for fast start-up during system wake-up. During system start-up, a feed-back path of the PLL is disconnected to independently control the VCO frequency. This independently controlled VCO then injects energy into a resonator (e.g., a crustal oscillator) for its fast start-up. Once a resonance frequency of the resonator is detected and an oscillation builds up in the resonator, a VCO control voltage is stored. The PLL feedback is then restored and the stored VCO control voltage is applied to perform phase-locking operation. Since the PLL control voltage is already set to the desired operating point, the PLL lock time is very small.
Public/Granted literature
- US20220393688A1 PHASE LOCKED LOOP ASSISTED FAST START-UP APPARATUS AND METHOD Public/Granted day:2022-12-08
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