Invention Application
- Patent Title: Reading circuit for semiconductor non-volatile memories
- Patent Title (中): 半导体非易失性存储器的读取电路
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Application No.: US09953070Application Date: 2001-09-13
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Publication No.: US20020057604A1Publication Date: 2002-05-16
- Inventor: Osama Khouri , Alessandro Manstretta , Guido Torelli
- Applicant: STMicroelectronics S.r.I.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.I.
- Current Assignee: STMicroelectronics S.r.I.
- Current Assignee Address: IT Agrate Brianza
- Priority: ITMI2000A002018 20000915
- Main IPC: G11C007/00
- IPC: G11C007/00

Abstract:
A reading circuit for semiconductor non-volatile memories connected to at least one selected cell and at least one reference cell, the circuit including current/voltage conversion circuits receiving at the input thereof a first current flowing through the selected cell and a second current flowing through the reference cell and providing respectively on a first circuit node a first selected cell voltage and on a second node a second reference cell voltage, as well as at least one differential amplifier, connected at the input of the first and the second nodes and having an output terminal effective to provide a logic signal correlated to the selected cell information. The reading circuit also includes at least a first voltage-controlled discharge switch circuit connected at the input of the first node and to a voltage reference, a second voltage-controlled discharge switch circuit connected at the input of the second node and to the voltage reference, as well as a first and a second voltage comparator circuits receiving at the input thereof the first selected cell voltage and the second reference cell voltage. Moreover, advantageously according to the invention, the comparator circuits are effective to control the switch circuits.
Public/Granted literature
- US06563737B2 Reading circuit for semiconductor non-volatile memories Public/Granted day:2003-05-13
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