公开(公告)号：US20020057604A1

公开(公告)日：2002-05-16

申请号：US09953070

申请日：2001-09-13

Applicant: STMicroelectronics S.r.I.

Inventor： Osama Khouri ,  Alessandro Manstretta ,  Guido Torelli

IPC: G11C007/00

CPC classification number: G11C7/062 ,  G11C16/28 ,  G11C2207/063

Abstract: A reading circuit for semiconductor non-volatile memories connected to at least one selected cell and at least one reference cell, the circuit including current/voltage conversion circuits receiving at the input thereof a first current flowing through the selected cell and a second current flowing through the reference cell and providing respectively on a first circuit node a first selected cell voltage and on a second node a second reference cell voltage, as well as at least one differential amplifier, connected at the input of the first and the second nodes and having an output terminal effective to provide a logic signal correlated to the selected cell information. The reading circuit also includes at least a first voltage-controlled discharge switch circuit connected at the input of the first node and to a voltage reference, a second voltage-controlled discharge switch circuit connected at the input of the second node and to the voltage reference, as well as a first and a second voltage comparator circuits receiving at the input thereof the first selected cell voltage and the second reference cell voltage. Moreover, advantageously according to the invention, the comparator circuits are effective to control the switch circuits.

Abstract translation: 一种用于连接到至少一个选定单元和至少一个参考单元的半导体非易失性存储器的读取电路，所述电路包括电流/电压转换电路，其在输入端接收流过选定单元的第一电流和流过所选单元的第二电流 所述参考单元并且分别在第一电路节点上提供第一选择的单元电压，并在第二节点上提供第二参考单元电压以及至少一个差分放大器，所述差分放大器连接在所述第一和第二节点的输入端，并且具有 输出端有效地提供与所选择的单元信息相关的逻辑信号。 读取电路还包括至少连接在第一节点的输入端和电压基准的第一压控放电开关电路，连接在第二节点的输入端的第二压控放电开关电路和电压基准 以及在其输入端接收第一选定单元电压和第二参考单元电压的第一和第二电压比较器电路。 此外，有利地根据本发明，比较器电路有效地控制开关电路。