Invention Application
US20030012925A1 Process for fabricating semiconductor structures and devices utilizing the formation of a compliant substrate for materials used to form the same and including an etch stop layer used for back side processing
审中-公开
用于制造半导体结构和器件的方法，所述半导体结构和器件利用用于形成相同材料的材料形成柔性衬底并且包括用于背面加工的蚀刻停止层
- Patent Title: Process for fabricating semiconductor structures and devices utilizing the formation of a compliant substrate for materials used to form the same and including an etch stop layer used for back side processing
- Patent Title (中): 用于制造半导体结构和器件的方法，所述半导体结构和器件利用用于形成相同材料的材料形成柔性衬底并且包括用于背面加工的蚀刻停止层
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Application No.: US09905110Application Date: 2001-07-16
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Publication No.: US20030012925A1Publication Date: 2003-01-16
- Inventor: Jonathan F. Gorrell
- Applicant: MOTOROLA, INC.
- Applicant Address: US IL Schaumburg
- Assignee: MOTOROLA, INC.
- Current Assignee: MOTOROLA, INC.
- Current Assignee Address: US IL Schaumburg
- Main IPC: H01L031/112
- IPC: H01L031/112 ; B32B003/10 ; H01L029/76 ; H01L031/036
Abstract:
Highly controlled, highly aligned monolithic integration of devices in a high quality monocrystalline material layer (26) with vias (211, 231) fabricated in an underlying monocrystalline substrate (22) in a single monolithic three dimensional architecture (20, 34). Excellent compliancy is achieved in a monolithic semiconductor structure (20, 34) by processes described herein while at the same time fabrication of via openings (211, 231) in the monocrystalline substrate (20, 34) can be made in a controlled, aligned manner to the back side (263) of a high quality monocrystalline film (26). Conductive connections (219, 239) can be made to devices (271, 273) in the high quality monocrystalline layer (26) from its backside (263).
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