Invention Application
US20030016563A1 Memory cells incorporating a buffer circuit and memory comprising such a memory cell 失效
包含缓冲电路的存储单元和包含这种存储单元的存储器

  • Patent Title: Memory cells incorporating a buffer circuit and memory comprising such a memory cell
  • Patent Title (中): 包含缓冲电路的存储单元和包含这种存储单元的存储器
  • Application No.: US10178081
    Application Date: 2002-06-21
  • Publication No.: US20030016563A1
    Publication Date: 2003-01-23
  • Inventor: Christophe Frey
  • Applicant: STMicroelectronics SA
  • Applicant Address: FR Montrouge
  • Assignee: STMicroelectronics SA
  • Current Assignee: STMicroelectronics SA
  • Current Assignee Address: FR Montrouge
  • Priority: FR0108270 20010622
  • Main IPC: G11C005/00
  • IPC: G11C005/00
Memory cells incorporating a buffer circuit and memory comprising such a memory cell
Abstract:
A memory cell is formed with a buffer circuit. The output of the buffer circuit is linked to the input to form a logic latch. A write-access transistor is disposed between a first node linked to a bit line and the input of the buffer circuit. A control gate of the write-access transistor is linked to a second node linked to a write word line, and a read-access transistor is disposed between a first node linked to a bit line and a second node linked to a read word line. A control gate of the read-access transistor is linked to the output of the buffer circuit.
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