Invention Application
US20030151949A1 Regulation method for the drain, body and source terminals voltages in a non-volatile memory cell during a program phase and corresponding program circuit
有权
在程序阶段和对应的程序电路期间，非易失性存储单元中的漏极，体和源端子电压的调节方法
- Patent Title: Regulation method for the drain, body and source terminals voltages in a non-volatile memory cell during a program phase and corresponding program circuit
- Patent Title (中): 在程序阶段和对应的程序电路期间，非易失性存储单元中的漏极，体和源端子电压的调节方法
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Application No.: US10331116Application Date: 2002-12-27
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Publication No.: US20030151949A1Publication Date: 2003-08-14
- Inventor: Rino Micheloni , Sabina Mognoni , Ilaria Motta , Andrea Sacco
- Applicant: STMicroelectronics S.r.I.
- Applicant Address: IT Agrate Brianza
- Assignee: STMicroelectronics S.r.I.
- Current Assignee: STMicroelectronics S.r.I.
- Current Assignee Address: IT Agrate Brianza
- Priority: EP01830833.8 20011228
- Main IPC: G11C011/34
- IPC: G11C011/34
Abstract:
A method and program-load circuit is for regulating the voltages at the drain and body terminals of a non-volatile memory cell being programmed. These voltages are applied from a program-load circuit connected in a conduction pattern to transfer a predetermined voltage value to at least one terminal of the memory cell. The method includes a step of regulating the voltage value locally, within the program-load circuit, to overcome the effect of a parasitic resistor present in the conduction pattern.
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