公开(公告)号：US20020122340A1

公开(公告)日：2002-09-05

申请号：US10002599

申请日：2001-10-31

Applicant: STMicroelectronics S.r.I

Inventor： Rino Micheloni ,  Andrea Sacco

IPC: G11C016/04

CPC classification number: G11C16/24 ,  G11C16/10

Abstract: A pulse programming method for a non-volatile memory device includes: addressing memory cells to be programmed within the device by selecting corresponding hierarchic decoder transistors; biasing the gate terminals of the memory cells; and programming the memory cells by applying a voltage pulse, regulated by a bias circuit, to the drain terminals of the memory cells. Advantageously, the programming method further comprises a step of precharging an internal node of the bias circuit before starting the programming step, the internal node being connected to a parasitic capacitance of the memory device.

Abstract translation: 一种用于非易失性存储器件的脉冲编程方法包括：通过选择相应的层级解码器晶体管寻址要在器件内编程的存储器单元; 偏置存储单元的栅极端子; 以及通过将由偏置电路调节的电压脉冲施加到存储器单元的漏极端子来对存储器单元进行编程。 有利地，编程方法还包括在开始编程步骤之前对偏置电路的内部节点进行预充电的步骤，内部节点连接到存储器件的寄生电容。

公开(公告)号：US20030151949A1

公开(公告)日：2003-08-14

申请号：US10331116

申请日：2002-12-27

Applicant: STMicroelectronics S.r.I.

Inventor： Rino Micheloni ,  Sabina Mognoni ,  Ilaria Motta ,  Andrea Sacco

IPC: G11C011/34

CPC classification number: G11C16/30

Abstract: A method and program-load circuit is for regulating the voltages at the drain and body terminals of a non-volatile memory cell being programmed. These voltages are applied from a program-load circuit connected in a conduction pattern to transfer a predetermined voltage value to at least one terminal of the memory cell. The method includes a step of regulating the voltage value locally, within the program-load circuit, to overcome the effect of a parasitic resistor present in the conduction pattern.

Abstract translation: 一种方法和程序加载电路用于调节正被编程的非易失性存储单元的漏极和体端子处的电压。 这些电压从连接在导通图案中的编程负载电路施加，以将预定的电压值传送到存储单元的至少一个端子。 该方法包括在编程负载电路内局部调节电压值以克服存在于导电图案中的寄生电阻的影响的步骤。