Invention Application
- Patent Title: Semiconductor device and manufacturing method thereof
- Patent Title (中): 半导体装置及其制造方法
-
Application No.: US10735759Application Date: 2003-12-16
-
Publication No.: US20040124443A1Publication Date: 2004-07-01
- Inventor: Kazuhiro Yoshida
- Applicant: Murata Manufacturing Co., Ltd.
- Applicant Address: JP Nagaokakyo-shi
- Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee: Murata Manufacturing Co., Ltd.
- Current Assignee Address: JP Nagaokakyo-shi
- Priority: JP2002-367764 20021219
- Main IPC: H01L029/80
- IPC: H01L029/80

Abstract:
A method for efficiently manufacturing a semiconductor device, the semiconductor device having an FET and a pn junction diode provided on the same semiconductor substrate, the FET having a Schottky junction for a gate electrode and a gate recess, includes the steps of forming a channel layer, a first etching stopper layer, an n-type common layer, a second etching stopper layer, a p-type layer, and a third etching stopper layer on the semiconductor substrate in that order; etching away the p-type layer and the third etching stopper layer in specific regions; simultaneously forming a source electrode, a drain electrode, a cathode; forming a mask having an opening for forming a gate recess and a gate electrode and an opening for forming an anode; forming the gate recess by etching while the third etching stopper layer prevents the p-type layer from being etched; and simultaneously forming the gate electrode and the anode.
Information query