公开(公告)号：US20030011959A1

公开(公告)日：2003-01-16

申请号：US10207406

申请日：2002-07-26

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Nobushige Moriwaki ,  Yasuhiko Kubota ,  Kazuhiro Yoshida ,  Kenichi Watanabe ,  Shigeki Nishiyama

IPC: H01G002/20

CPC classification number: H01G4/232 ,  H01F2027/295 ,  H01G4/228 ,  H05K3/3426 ,  H05K2201/10636 ,  H05K2201/10946 ,  Y02P70/611 ,  Y02P70/613

Abstract: In a terminal member, a protuberance is formed so as to protrude toward an external electrode, and thereby, a bonding portion where the terminal member is bonded to the external electrode, the bonding portion being formed with solder, is extended substantially linearly across a part of the external electrode. Preferably, the direction in which the bonding portion is elongated linearly is in parallel to that in which internal electrodes are extended. Further, it is preferable that the bonding portion is as wide as possible, and the center of the bonding portion in the width direction is as near to the center of the end-face of the capacitor body as possible.

Abstract translation: 在端子构件中，突起形成为朝向外部电极突出，并且由此，端子构件与外部电极接合的接合部分，形成有焊料的接合部分基本上线性延伸穿过部件 的外部电极。 优选地，接合部分线性延伸的方向与内部电极延伸的方向平行。 此外，优选的是，接合部分尽可能宽，并且接合部分在宽度方向上的中心尽可能接近电容器主体的端面的中心。

公开(公告)号：US20040124443A1

公开(公告)日：2004-07-01

申请号：US10735759

申请日：2003-12-16

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Kazuhiro Yoshida

IPC: H01L029/80

CPC classification number: H01L29/66871 ,  H01L27/0629 ,  H01L27/095

Abstract: A method for efficiently manufacturing a semiconductor device, the semiconductor device having an FET and a pn junction diode provided on the same semiconductor substrate, the FET having a Schottky junction for a gate electrode and a gate recess, includes the steps of forming a channel layer, a first etching stopper layer, an n-type common layer, a second etching stopper layer, a p-type layer, and a third etching stopper layer on the semiconductor substrate in that order; etching away the p-type layer and the third etching stopper layer in specific regions; simultaneously forming a source electrode, a drain electrode, a cathode; forming a mask having an opening for forming a gate recess and a gate electrode and an opening for forming an anode; forming the gate recess by etching while the third etching stopper layer prevents the p-type layer from being etched; and simultaneously forming the gate electrode and the anode.

Abstract translation: 一种用于有效制造半导体器件的方法，具有设置在同一半导体衬底上的FET和pn结二极管的半导体器件，具有用于栅极电极的肖特基结和FET栅极的FET包括以下步骤：形成沟道层 ，在半导体衬底上的第一蚀刻停止层，n型公共层，第二蚀刻停止层，p型层和第三蚀刻停止层; 在特定区域蚀刻掉p型层和第三蚀刻阻挡层; 同时形成源电极，漏电极，阴极; 形成具有用于形成栅极凹部的开口和用于形成阳极的栅电极和开口的掩模; 通过蚀刻形成栅极凹槽，同时第三蚀刻停止层防止p型层被蚀刻; 并同时形成栅电极和阳极。

公开(公告)号：US20020084091A1

公开(公告)日：2002-07-04

申请号：US09993566

申请日：2001-11-27

Applicant: Murata Manufacturing Co., Ltd.

Inventor： Nobushige Moriwaki ,  Masahiro Nishio ,  Kazuhiro Yoshida ,  Kazuyuki Kubota ,  Shigeki Nishiyama

IPC: H01L023/02

CPC classification number: H01G2/08 ,  H01G4/38 ,  H01L2924/0002 ,  H05K1/141 ,  H05K1/18 ,  H05K1/181 ,  H01L2924/00

Abstract: A ceramic condenser module includes at least one first multi-layered ceramic condenser and at least one second multi-layered ceramic condenser, which are mounted to a front surface and a back surface of a substrate, respectively. When a total surface area of the outside surfaces of the mounted first and second multi-layered ceramic condensers excluding surfaces thereof opposing the substrate is defined as S2, and a total equal to S2 and a surface area of the outside surface of the substrate excluding the area covered by the first and second multi-layered ceramic condensers is defined as S1, S1 is equal to or greater than about 1.3 times S2. With this arrangement, the ceramic condenser module is suitable for use with large amounts of current, has excellent heat-dissipation effect, is much smaller and much less expensive.

Abstract translation: 陶瓷冷凝器模块包括至少一个第一多层陶瓷电容器和至少一个第二多层陶瓷电容器，它们分别安装到基板的前表面和后表面。 当除了与衬底相对的表面之外的所安装的第一和第二多层陶瓷电容器的外表面的总表面积被定义为S2，并且总计等于S2和除基板外表面的表面积 由第一和第二多层陶瓷电容器覆盖的区域被定义为S1，S1等于或大于约1.3倍S2。 通过这种布置，陶瓷电容器模块适用于大量电流，具有优异的散热效果，要小得多，成本便宜得多。

公开(公告)号：US20010055194A1

公开(公告)日：2001-12-27

申请号：US09866424

申请日：2001-05-25

Applicant: Murata Manufacturing Co., Ltd

Inventor： Nobushige Moriwaki ,  Shigeki Nishiyama ,  Kazuhiro Yoshida ,  Masahiro Nishio ,  Kazuyuki Kubota

IPC: H01G004/06 ,  H01G004/38

CPC classification number: H02M7/003 ,  H05K1/144 ,  H05K1/18

Abstract: An inverter capacitor module includes a plurality of substrates having a plurality of ceramic capacitors provided on the top surfaces thereof, and first and second feeding unit lands having conductive films provided on both surfaces thereof and arranged to feed the plurality of ceramic capacitors, the first and second feeding unit lands on both surfaces thereof being electrically connected to each other, a conductive spacer inserted between the plurality of substrates for establishing one of an electrical connection between the first feeding unit lands of an underlying substrate and its overlying substrate and an electrical connection between the second feeding unit lands of an underlying substrate and its overlying substrate, a fixing member arranged to fix the plurality of substrates laminated via the conductive spacer, and a switching module fixed below the bottom substrate among the plurality of substrates that are laminated. In the inverter capacitance module, the switching module is fixed to the plurality of substrates by the fixing element.

Abstract translation: 逆变器电容器模块包括多个基板，其多个陶瓷电容器设置在其顶表面上，第一和第二馈电单元焊盘具有设置在其两个表面上的导电膜，并布置成馈送多个陶瓷电容器，第一和第二馈电单元 插入在所述多个基板之间的导电间隔件，用于建立下面的基板的第一馈送单元平台与其上覆的基板之间的电连接之间的电连接和第二馈电单元的两个表面之间的电连接， 下部基板的第二馈送单元和其上覆的基板，经由导电间隔件固定多个基板的固定部件和固定在层叠的多个基板之中的底部基板下方的切换模块。 在逆变器电容模块中，开关模块通过固定元件固定到多个基板。