Invention Application
- Patent Title: Nonvolatile memory and manufacturing method thereof
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Application No.: US10866766Application Date: 2004-06-15
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Publication No.: US20040222424A1Publication Date: 2004-11-11
- Inventor: Shunpei Yamazaki , Jun Koyama , Keisuke Hayashi
- Applicant: Semiconductor Energy Laboratory Co., Ltd.
- Applicant Address: JP Atsugi-shi
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP Atsugi-shi
- Priority: JP09-273454 19970920; JP10-158315 19980522
- Main IPC: H01L029/04
- IPC: H01L029/04

Abstract:
Memory elements, switching elements, and peripheral circuits to constitute a nonvolatile memory are integrally formed on a substrate by using TFTs. Since semiconductor active layers of memory element TFTs are thinner than those of other TFTs, impact ionization easily occurs in channel regions of the memory element TFTs. This enables low-voltage write/erase operations to be performed on the memory elements, and hence the memory elements are less prone to deteriorate. Therefore, a nonvolatile memory capable of miniaturization can be provided.
Public/Granted literature
- US07078769B2 Nonvolatile memory and manufacturing method thereof Public/Granted day:2006-07-18
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