公开(公告)号：US20040266056A1

公开(公告)日：2004-12-30

申请号：US10610347

申请日：2003-06-30

发明人： Kramadhati V. Ravi ,  James G. Maveety

IPC分类号： H01L029/04 ,  H01L021/00 ,  H01L021/44 ,  H01L031/036

CPC分类号： H01L23/3732 ,  H01L2224/16 ,  H01L2224/73253 ,  H01L2924/00014 ,  H01L2924/10253 ,  H01L2924/00 ,  H01L2224/0401

摘要： An electronic device includes a die further having a first major surface, and a second major surface. The electronic device also includes a plurality of connectors associated with the first major surface of the die, and an integrated heat spreader in thermally conductive relation with the second major surface of the die. The integrated heat spreader also has a layer of silicon, and a layer of diamond attached to the layer of silicon. The first major surface of the die attached to a printed circuit board. A method for forming a heat dissipating device includes placing a layer of diamond on a silicon substrate, and thinning the silicon substrate. The substrate is diced to form a plurality of heat dissipating devices sized to form a thermally conductive connection to a die. A surface of the silicon substrate is placed in thermal communication with a source of heat.

摘要翻译： 电子设备包括还具有第一主表面的模具和第二主表面。 电子设备还包括与管芯的第一主表面相关联的多个连接器，以及与管芯的第二主表面具有导热关系的集成散热器。 集成的散热器还具有一层硅层和一层附着在硅层上的金刚石。 芯片的第一个主表面附着在印刷电路板上。 一种用于形成散热装置的方法包括将金刚石层放置在硅衬底上，并使硅衬底变薄。 切割基板以形成多个散热装置，其大小以形成与管芯的导热连接。 硅衬底的表面被放置成与热源热连通。

公开(公告)号：US20040262630A1

公开(公告)日：2004-12-30

申请号：US10856467

申请日：2004-05-27

申请人： MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. ,  Yusuke MORI

发明人： Yasuo Kitaoka ,  Hisashi Minemoto ,  Isao Kidoguchi ,  Takatomo Sasaki ,  Yusuke Mori ,  Fumio Kawamura ,  Masanori Morishita

IPC分类号： H01L031/0328 ,  H01L029/04 ,  H01L031/072 ,  H01L033/00

CPC分类号： H01L33/32 ,  H01L21/0237 ,  H01L21/02389 ,  H01L21/0243 ,  H01L21/02458 ,  H01L21/02494 ,  H01L21/02502 ,  H01L21/0254 ,  H01L21/02625 ,  H01L29/2003 ,  H01L29/66856

摘要： The present invention provides a method of manufacturing Group III nitride crystals that are of high quality, are manufactured highly efficiently, and are useful and usable as a substrate that is used in semiconductor manufacturing processes. The method of manufacturing Group III nitride crystals includes: forming a first layer made of a semiconductor that is expressed by a composition formula of AlsGatIn1-s-tN (where 0nullsnull1, 0nulltnull1, and snulltnull1); forming a second layer by bringing the surface of the first layer into contact with a melt in an atmosphere including nitrogen, wherein the second layer includes greater defects in a crystal structure, such as a dislocation density for example, than those of the first layer, and the melt includes alkali metal and at least one Group III element selected from the group consisting of gallium, aluminum, and indium; and forming a third layer through crystal growth in the melt in an atmosphere including nitrogen, wherein the third layer is made of a semiconductor that is expressed by a composition formula of AluGavIn1-u-vN (where 0nullunull1, 0nullvnull1, and unullvnull1), and the third layer has less defects in a crystal structure, such as a dislocation density for example, than those of the second layer.

摘要翻译： 本发明提供一种制造高品质的III族氮化物晶体的方法，其制造高效率，并且可用和用作半导体制造工艺中使用的基板。 制造III族氮化物晶体的方法包括：形成由AlsGatIn1-s-tN的组成式表示的半导体制成的第一层（其中0≤s≤1,0<= t <= 1，和 s + t <= 1）; 通过使第一层的表面在包括氮气的气氛中与熔体接触而形成第二层，其中第二层在诸如位错密度的晶体结构中具有比第一层更大的缺陷， 并且熔体包括碱金属和至少一种选自镓，铝和铟的III族元素; 并且在包括氮气的气氛中通过在熔体中的晶体生长形成第三层，其中第三层由以下组成式表示的半导体制成：AlluGavIn1-u-vN（其中0 <= u <= 1,0 <= v <= 1，u + v <= 1），并且第三层在诸如位错密度的晶体结构中具有比第二层更少的缺陷。

公开(公告)号：US20040262607A1

公开(公告)日：2004-12-30

申请号：US10843337

申请日：2004-05-12

发明人： Takatoshi Tsujimura ,  Shinya Ono ,  Mitsuo Morooka ,  Koichi Miwa

IPC分类号： H01L029/04 ,  H01L031/036 ,  H01L031/0376

CPC分类号： H01L29/78696 ,  H01L29/42384 ,  H01L29/78609 ,  H01L29/78669

摘要： A thin film transistor according to the present invention includes a gate electrode, a semiconductor layer having a channel forming region arranged on the gate electrode and an impurity region arranged on a part of the channel forming region, source and drain electrodes electrically connected to the impurity region, and a gate insulating film that electrically insulates the gate electrode and the semiconductor layer, wherein the distance between the upper end of the gate electrode and the upper end of the impurity region is larger than the distance between the upper end of the gate electrode and the upper end of the channel forming region.

摘要翻译： 根据本发明的薄膜晶体管包括栅电极，具有布置在栅电极上的沟道形成区的半导体层和布置在沟道形成区的一部分上的杂质区，与杂质电连接的源极和漏极 以及使栅电极和半导体层电绝缘的栅极绝缘膜，其中栅电极的上端和杂质区的上端之间的距离大于栅电极的上端之间的距离 和通道形成区域的上端。

公开(公告)号：US20040256623A1

公开(公告)日：2004-12-23

申请号：US10890129

申请日：2004-07-14

申请人： Semiconductor Energy Laboratory Co., Ltd., a Japan corporation

发明人： Shunpei Yamazaki

IPC分类号： H01L029/04

CPC分类号： H01L29/66757 ,  G02F1/1368 ,  H01L27/124 ,  H01L29/78621 ,  H01L29/78633 ,  H01L29/78645 ,  H01L29/78648

摘要： An object of the present invention is to provide an active matrix type display unit having a pixel structure in which a pixel electrode formed in a pixel portion a scanning line (gate line) and a data line are suitably arranged, and high numerical aperture is realized without increasing the number of masks and the number of processes. In this display unit, a first wiring arranged between a semiconductor film and a substrate through a first insulating film is overlapped with this semiconductor film and is used as a light interrupting film. Further, a second insulating film used as a gate insulating film is formed on the semiconductor film. A gate electrode and a second wiring are formed on the second insulating film. The first and second wirings cross each other through the first and second insulating films. A third insulating film is formed as an interlayer insulating film on the second wiring, and a pixel electrode is formed on this third insulating film. The pixel electrode can be overlapped with the first and second wirings so that an area of the pixel electrode can be increased in the display unit of a reflection type.

摘要翻译： 本发明的目的是提供一种有源矩阵型显示单元，其具有像素结构，其中形成在扫描线（栅极线）和数据线的像素部分中的像素电极被适当地布置，并且实现了高数值孔径 而不增加掩码的数量和进程的数量。 在该显示单元中，通过第一绝缘膜在半导体膜和衬底之间布置的第一布线与该半导体膜重叠，并用作遮光膜。 此外，在半导体膜上形成用作栅极绝缘膜的第二绝缘膜。 在第二绝缘膜上形成栅电极和第二布线。 第一和第二布线通过第一和第二绝缘膜互相交叉。 在第二布线上形成第三绝缘膜作为层间绝缘膜，并且在该第三绝缘膜上形成像素电极。 像素电极可以与第一和第二布线重叠，使得可以在反射型显示单元中增加像素电极的面积。

公开(公告)号：US20040232417A1

公开(公告)日：2004-11-25

申请号：US10831815

申请日：2004-04-26

申请人： Dongbu Electronics Co., LTD.

发明人： Hoon Jang ,  Keun Hyuk Lim

IPC分类号： H01L029/04

CPC分类号： H01L27/14603 ,  H01L27/14609 ,  H01L27/14643 ,  H01L27/14689 ,  H01L31/0352 ,  H01L31/103

摘要： A pinned photodiode for a CMOS image sensor and fabricating method thereof is disclosed. The disclosed pinned photodiode can reduce a probability of recombination of excess electrons by forming a second potential well having a center-cross form across a photodiode area. The disclosed pinned photodiode-fabricating method comprises forming a photodiode on a substrate, forming a first potential well between the substrate and the photodiode, and forming a second potential well having a center-cross form across said photodiode, which is positioned more deeply than said first potential well.

摘要翻译： 公开了一种用于CMOS图像传感器的钉扎光电二极管及其制造方法。 所公开的钉扎光电二极管可以通过在光电二极管区域上形成具有中心交叉形式的第二势阱来降低多余电子的复合的可能性。 所公开的钉扎光电二极管制造方法包括在衬底上形成光电二极管，在衬底和光电二极管之间形成第一势阱，并形成跨越所述光电二极管的中心交叉形式的第二势阱，其位于比所述 第一潜力好

公开(公告)号：US20040222515A1

公开(公告)日：2004-11-11

申请号：US10430818

申请日：2003-05-05

申请人： IXYS Corporation

发明人： Kang Rim Choi ,  Nathan Zommer

IPC分类号： H01L029/04 ,  H01L031/036

CPC分类号： H01L23/3735 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48472 ,  H01L2224/73265 ,  H01L2924/13034 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/00014 ,  H01L2924/00

摘要： A power device includes a semiconductor die having an upper surface and a lower surface. One or more terminals are coupled to the die. A first substrate is bonded to the upper surface of the die. The first substrate is configured to provide a first heat dissipation path. A second substrate is bonded to the lower surface of the die. The second substrate is configured to provide a second heat dissipation path.

摘要翻译： 功率器件包括具有上表面和下表面的半导体管芯。 一个或多个端子耦合到管芯。 第一基板结合到模具的上表面。 第一基板被配置成提供第一散热路径。 第二基板结合到模具的下表面。 第二基板被配置成提供第二散热路径。

公开(公告)号：US20040222423A1

公开(公告)日：2004-11-11

申请号：US10434169

申请日：2003-05-09

发明人： Ming-Dou Ker ,  Wen-Hsia Kung ,  Ya-Hsiang Tai

IPC分类号： H01L029/04

CPC分类号： H01L29/78615

摘要： A thin-film transistor (TFT) with body contacts is disclosed. It is used in polysilicon TFT LCD's. A body contact region for separating the gate electrode, a source region, and a drain region is made in the TFT. Through the dopants in the body contact region and different impurities in the source region and the drain region, a body-trigger bias is imposed on the body of the TFT. This method reduces the threshold voltage of the TFT driving circuit, thereby increasing the driving current.

摘要翻译： 公开了一种具有体触点的薄膜晶体管（TFT）。 它用于多晶硅TFT LCD。 在TFT中制造用于分离栅电极，源极区和漏极区的体接触区域。 通过体接触区域中的掺杂剂和源极区域和漏极区域中的不同杂质，对TFT的主体施加体触发偏置。 该方法降低了TFT驱动电路的阈值电压，从而增加了驱动电流。

公开(公告)号：US20040217356A1

公开(公告)日：2004-11-04

申请号：US10834337

申请日：2004-04-28

申请人： Toppoly Optoelectronics Corp.

发明人： Shih-Chang Chang ,  De-Hua Deng ,  Yaw-Ming Tsai

IPC分类号： H01L029/04

CPC分类号： H01L29/78696 ,  H01L29/42384 ,  H01L29/78621 ,  H01L29/78645

摘要： A thin film transistor (TFT) structure includes a substrate, a polysilicon structure including a plurality of channel regions, at least one lightly doped region and at least one heavily doped source/drain region, a plurality of gate structures, and an insulating layer formed between the gate structures and the polysilicon structure. The thickness of a first portion of the insulating layer under and between the gate structures is greater than the thickness of a second portion of the insulating layer adjacent to the first portion. At least one lightly doped region is formed under the first portion of the insulating layer and at least one heavily doped source/drain region is formed under the second portion of the insulating layer via the same doping procedure.

摘要翻译： 薄膜晶体管（TFT）结构包括基板，包括多个沟道区的多晶硅结构，至少一个轻掺杂区和至少一个重掺杂源极/漏极区，多个栅极结构和形成的绝缘层 在栅极结构和多晶硅结构之间。 栅极结构之下和之间的绝缘层的第一部分的厚度大于与第一部分相邻的绝缘层的第二部分的厚度。 至少一个轻掺杂区域形成在绝缘层的第一部分之下，并且通过相同的掺杂程序在绝缘层的第二部分下形成至少一个重掺杂的源极/漏极区域。

公开(公告)号：US20040214426A1

公开(公告)日：2004-10-28

申请号：US10832405

申请日：2004-04-27

申请人： RENESAS TECHNOLOGY CORP.

发明人： Junjirou Sakai

IPC分类号： H01L029/04 ,  H01L031/036 ,  H01L031/0376 ,  H01L031/20 ,  H01L021/4763 ,  H01L021/302 ,  H01L021/461

CPC分类号： H01L21/76802 ,  G03F7/091 ,  G03F7/11

摘要： An EB curing process is performed on a photoresist (7), with an energy beam absorbing film (5) formed on a low dielectric constant interlayer insulator film (4). The energy beam absorbing film (5) contains a compound represented by the following general formula: 1 wherein at least one of X, Xnull, R and Rnull is selected from the group consisting of bromine, iodine, an alkyl bromide and an alkyl iodide, and n is a positive integer. The compound represented by the general formula absorbs an electron beam well to make it difficult for the electron beam to reach the low dielectric constant interlayer insulator film (4) to be patterned.

摘要翻译： 在光致抗蚀剂（7）上进行EB固化工艺，其中能量吸收膜（5）形成在低介电常数层间绝缘膜（4）上。 能量束吸收膜（5）含有由以下通式表示的化合物：其中X，X'，R和R'中的至少一个选自溴，碘，烷基溴和烷基碘 ，n为正整数。 由通式表示的化合物很好地吸收电子束，使得电子束难以到达要被图案化的低介电常数层间绝缘膜（4）。

公开(公告)号：US20040211960A1

公开(公告)日：2004-10-28

申请号：US10649107

申请日：2003-08-26

发明人： In-Su Joo ,  Joon-Hoo Choi ,  Jean-Ho Song

IPC分类号： H01L029/04 ,  H01L027/10 ,  H01L031/036 ,  H01L031/20

CPC分类号： H01L27/124 ,  H01L27/1214 ,  H01L27/14632 ,  H01L27/14643 ,  H01L27/14678

摘要： In an image recognition apparatus and an LCD apparatus having the same, a plurality of gate lines arranged in a transparent substrate has a predetermined slope such that the gate lines intersect with two sides of the transparent substrate, which are adjacent to or facing each other. A plurality of sensing signal output line arranged in the transparent substrate is substantially perpendicular to the gate lines. An image recognition sensor is formed on a pixel area defined by the gate and sensing signal output lines adjacent to each other. The image recognition sensor senses an image pattern of an object in response to gate driving signals from the gate lines and outputs the sensed image pattern through the sensing signal output lines. Accordingly, the LCD apparatus may prevent appearance of the moire image and deterioration of the display quality of the LCD panel.

摘要翻译： 在具有这样的图像识别装置和LCD装置中，布置在透明基板中的多个栅极线具有预定的斜率，使得栅极线与透明基板的彼此相邻或相对的两侧相交。 布置在透明基板中的多个感测信号输出线基本上垂直于栅极线。 图像识别传感器形成在由栅极和彼此相邻的感测信号输出线限定的像素区域上。 图像识别传感器响应于来自栅极线的栅极驱动信号感测物体的图像图案，并通过感测信号输出线输出感测到的图像图案。 因此，LCD装置可以防止莫尔图像的出现和LCD面板的显示质量的劣化。