发明申请
US20050007684A1 Data synchronizing signal detector, signal processing device using the detector, information recording and reproducing apparatus having the detector and the device, data synchronizing signal detecting method, and information recording medium for using in the method
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数据同步信号检测器，使用检测器的信号处理装置，具有检测器和装置的信息记录和再现装置，数据同步信号检测方法和用于该方法的信息记录介质
- 专利标题： Data synchronizing signal detector, signal processing device using the detector, information recording and reproducing apparatus having the detector and the device, data synchronizing signal detecting method, and information recording medium for using in the method
- 专利标题（中）： 数据同步信号检测器，使用检测器的信号处理装置，具有检测器和装置的信息记录和再现装置，数据同步信号检测方法和用于该方法的信息记录介质
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申请号： US10910532申请日： 2004-08-03
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公开(公告)号： US20050007684A1公开(公告)日： 2005-01-13
- 发明人: Yoshiju Watanabe , Terumi Takashi
- 申请人： Yoshiju Watanabe , Terumi Takashi
- 优先权： JP2000-148835 20000519
- 主分类号： G11B20/14
- IPC分类号： G11B20/14 ; G11B5/012 ; G11B5/09 ; G11B20/10 ; G11B20/18 ; G11B27/10 ; G11B27/30 ; H04L1/00 ; H04L7/04 ; H04L7/08
摘要：
A data discriminating unit includes a data discriminator and a sync signal discriminator. A data sync signal is detected for the bit string discriminated from the output of the sync signal discriminator, and the data is demodulated for the bit string discriminated from the output of the data discriminator, thereby optimizing the signal to a form suitable for discrimination and detection of the data sync signal and demodulation for data reproduction. As a result, the detection performance of the data sync signal can be improved while maintaining the data discrimination performance. A Viterbi decoder is used for discrimination by the data discriminator and the sync signal discriminator for the optimization thereby to optimize the number of states, the number of paths for state transition and the path memory length. A signal having no continuous inversions of the recording data is used as the data sync signal.
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