- 专利标题: Vertical double-channel silicon-on-insulator transistor and method of manufacturing the same
-
申请号: US10759239申请日: 2004-01-20
-
公开(公告)号: US20050017289A1公开(公告)日: 2005-01-27
- 发明人: Ji-Young Kim , Jin-Jun Park
- 申请人: Ji-Young Kim , Jin-Jun Park
- 优先权: KR2003-0050938 20030724
- 主分类号: H01L21/762
- IPC分类号: H01L21/762 ; H01L21/336 ; H01L21/76 ; H01L21/8234 ; H01L27/088 ; H01L27/11 ; H01L29/423 ; H01L29/76 ; H01L29/78 ; H01L29/786
摘要:
A vertical double channel silicon-on-insulator (SOI) field-effect-transistor (FET) includes a pair of two vertical semiconductor layers in contact with a pair of parallel shallow trench isolation layers on a substrate, a source, a drain and a channel region on each of the pair of vertical semiconductor layers with corresponding regions on the pair of vertical semiconductor layers facing each other in alignment, a gate oxide on the channel region of both of the pair of the vertical semiconductor layers, and a gate electrode, a source electrode, and a drain electrode electrically connecting the respective regions of the pair of vertical semiconductor layers.
公开/授权文献
信息查询
IPC分类: