An integrated circuit having a clock calibration device receiving a local clock signal from an oscillator and applying a correction value to the signal to produce a corrected clock signal. The clock calibration device includes a frequency dividing module having a programmable divider and a calibration register for storing the correction value, the programmable divider receiving the local clock signal and delivering the corrected clock signal, and a circuit for determining a new correction value using an external reference signal. A time base unit produces a time base signal using a timing signal derived from the local clock signal, and it includes a counting module coupled to a load register wherein a load value is stored that determines the ratio between the frequency of the time base signal and that of the timing signal. An external computing unit loads a new load value into the load register by using the new correction value stored in the calibration register to deduce the new load value therefrom.