Invention Application
- Patent Title: Diffusion barrier for copper lines in integrated circuits
- Patent Title (中): 集成电路中铜线的扩散障碍
-
Application No.: US10640733Application Date: 2003-08-14
-
Publication No.: US20050037613A1Publication Date: 2005-02-17
- Inventor: Stephan Grunow , Satyavolu Rao , Noel Russell
- Applicant: Stephan Grunow , Satyavolu Rao , Noel Russell
- Main IPC: H01L21/28
- IPC: H01L21/28 ; H01L21/285 ; H01L21/3205 ; H01L21/768 ; H01L23/52 ; H01L21/4763 ; H01L21/44
Abstract:
A method for forming improved diffusion barriers for copper lines in integrated circuits is described. A low-k dielectric layer (10) is formed over a semiconductor (5). A trench (15) is formed in the low-k dielectric layer (10) and a TiNSi layer (20) is formed in the trench. An α-Ta layer (30) is formed over the TiNSi layer (20) and copper (40) is subsequently formed in the trench (15) filling the trench (15).
Information query
IPC分类:
