发明申请
- 专利标题: ATM switch
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申请号: US10972175申请日: 2004-10-22
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公开(公告)号: US20050083939A1公开(公告)日: 2005-04-21
- 发明人: Seisho Yasukawa , Naoki Takaya , Masayoshi Nebeshima , Eiji Oki , Naoaki Yamanaka
- 申请人: Seisho Yasukawa , Naoki Takaya , Masayoshi Nebeshima , Eiji Oki , Naoaki Yamanaka
- 优先权: JP10-235957 19980821; JP10-266802 19980921; JP10-266930 19980921
- 主分类号: H04L12/54
- IPC分类号: H04L12/54 ; H04L12/70 ; H04L12/933 ; H04Q11/04 ; H04Q11/00
摘要:
An ATM switch includes a first stage, a second stage and a third stage each of which stages includes at least one basic switch, wherein the first stage, the second stage and the third stage are connected. The basic switch includes a part which refers to time information written in a header of an input cell and switches cells to an output port in an ascending order of the time information. In addition, the ATM switch includes a cell distribution part in the basic switch of the first stage. The cell distribution part determines a routes of a cell to be transferred such that loads of routes within the ATM switch are balanced. The ATM switch further includes an adding part which adds arriving time information to an arriving cell as the time information.
公开/授权文献
- US07292576B2 ATM switch having output buffers 公开/授权日:2007-11-06
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