发明申请
US20050156642A1 Feed-forward circuit for reducing delay through an input buffer
有权
前馈电路，用于通过输入缓冲器减少延迟
- 专利标题： Feed-forward circuit for reducing delay through an input buffer
- 专利标题（中）： 前馈电路，用于通过输入缓冲器减少延迟
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申请号： US10759339申请日： 2004-01-16
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公开(公告)号： US20050156642A1公开(公告)日： 2005-07-21
- 发明人: Scott Becker , Brian Reed , Puneet Sawhney , Jayanth Thyamagundlam
- 申请人： Scott Becker , Brian Reed , Puneet Sawhney , Jayanth Thyamagundlam
- 申请人地址： US CA Sunnyvale
- 专利权人： Artisan Components, Inc.
- 当前专利权人： Artisan Components, Inc.
- 当前专利权人地址： US CA Sunnyvale
- 主分类号： H03K19/017
- IPC分类号： H03K19/017 ; H03B1/00
摘要：
An invention is provided for a feed forward circuit that reduces delay through an inverting circuit. The feed forward circuit includes an inverter having an input and an output, and an inverting circuit having an input and an output. The input of the inverting circuit is coupled to the output of the inverter. A feed forward transistor having a gate coupled to the input of the inverter and a terminal coupled to the output of the inverting circuit also is included. In operation the feed forward transistor decreases the amount of time required for the output of the inverting circuit to change state. In sum, the invention reduces the delay when the inverting circuit transitions to a high state, without affecting the timing of the transition to a low state.
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