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发明申请
US20050174138A1 Method, circuit and system for determining burn-in reliability from wafer level burn-in 有权
用于确定晶片级老化的老化可靠性的方法，电路和系统

  • 专利标题： Method, circuit and system for determining burn-in reliability from wafer level burn-in
  • 专利标题（中）： 用于确定晶片级老化的老化可靠性的方法，电路和系统
  • 申请号： US11065016
    申请日： 2005-02-24
  • 公开(公告)号： US20050174138A1
    公开(公告)日： 2005-08-11
  • 发明人: Kenneth Marr
  • 申请人： Kenneth Marr
  • 主分类号： G01R31/26
  • IPC分类号： G01R31/26 ;  G01R31/28 ;  G01R31/3185 ;  G11C29/00 ;  G11C29/12 ;  G11C29/44
Method, circuit and system for determining burn-in reliability from wafer level burn-in
摘要：
A method, circuit and system for determining burn-in reliability from wafer level burn-in are disclosed. The method according to the present invention includes recording the number of failures in each IC die in nonvolatile elements on-chip at points in time over the duration of wafer level burn-in testing. The number of failures in each IC die, along with their associated points in time, may be used to create burn-in reliability curves which are conventionally derived using other processes that may be less cost effective or not possible to effect with unpackaged IC dice. Circuits and systems associated with the method of the present invention are also disclosed.
摘要（中）：

公开了一种用于从晶片级老化确定老化可靠性的方法，电路和系统。 根据本发明的方法包括在晶片级老化测试的持续时间内的时间点上将每个IC管芯中的故障数记录在片上的非易失性元件中。 每个IC芯片中的故障数量及其相关联的时间点可用于创建老化可靠性曲线，其通常使用其他可能具有较低成本效益或不可能通过未封装的IC芯片实现的其他过程得到。 还公开了与本发明的方法相关的电路和系统。

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