A semiconductor storage device comprises memory cells having a floating body region and storing data by accumulating or releasing electric charges in or from the floating body region; a memory cell array including a matrix arrangement of said memory cells; a plurality of word lines each connected to said memory cells of each row in the memory cell array; and a counter cell array including counter cells each provided in correspond to each said word line to store occurrences of activation of the word line to read out data from the memory cells.