发明申请
US20050207223A1 Latch circuit and method for writing and reading volatile and non-volatile data to and from the latch
有权
锁存电路和用于向和从锁存器写入和读取易失性和非易失性数据的方法
- 专利标题: Latch circuit and method for writing and reading volatile and non-volatile data to and from the latch
- 专利标题(中): 锁存电路和用于向和从锁存器写入和读取易失性和非易失性数据的方法
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申请号: US10803011申请日: 2004-03-17
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公开(公告)号: US20050207223A1公开(公告)日: 2005-09-22
- 发明人: Babak Taheri , Sanjeev Maheshwari , Fredrick Jenne
- 申请人: Babak Taheri , Sanjeev Maheshwari , Fredrick Jenne
- 主分类号: G11C7/20
- IPC分类号: G11C7/20 ; G11C14/00
摘要:
A latching circuit is provided that includes a latch, a storage element, and a selection circuit coupled between the latch and the storage element. The latch can receive true and complementary voltage values from, for example, a data bus and, if called upon, forward the latched value to the non-volatile storage element via the selection circuit. Control signals sent to the selection circuit allow the latched data to be written to or read from the storage element. Once programmed, the voltage values will remain in the latching circuit even after power is removed. If the latched data is not sent to the non-volatile storage element, the latching circuit essentially functions as a volatile latch, and the data will be lost if power is removed. The switching circuit thereby operates as a dual-purpose volatile and non-volatile latching circuit that can be embodied as an array of latching circuits that temporarily and/or permanently store true and complementary data signals.
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