发明申请
- 专利标题: Semiconductor integrated circuit device
- 专利标题(中): 半导体集成电路器件
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申请号: US11136510申请日: 2005-05-25
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公开(公告)号: US20050265096A1公开(公告)日: 2005-12-01
- 发明人: Tadahiro Obara , Masatoshi Hasegawa , Yousuke Tanaka , Tomofumi Hokari , Kenichi Tajima
- 申请人: Tadahiro Obara , Masatoshi Hasegawa , Yousuke Tanaka , Tomofumi Hokari , Kenichi Tajima
- 专利权人: Hitachi, Ltd.,Hitachi ULSI Systems Co., Ltd.
- 当前专利权人: Hitachi, Ltd.,Hitachi ULSI Systems Co., Ltd.
- 优先权: JP2004-154886 20040525
- 主分类号: H01L27/108
- IPC分类号: H01L27/108 ; G11C7/00 ; G11C7/12 ; G11C11/401 ; G11C11/409 ; H01L21/8242 ; H01L27/105
摘要:
A DRAM whose operation is sped up and power consumption is reduced is provided. A pair of precharge MOSFETs for supplying a precharge voltage to a pair of input/output nodes of a CMOS sense amplifier is provided; the pair of input/output nodes are connected to a complementary bit-line pair via a selection switch MOSFET; a first equalize MOSFET is provided between the complementary bit-line pair for equalizing them; a memory cell is provided between one of the complementary bit-line pair and a word line intersecting with it; gate insulators of the selection switch MOSFETs and first equalize MOSFET are formed by first film thickness; a gate insulator of the precharge MOSFET is formed by second film thickness thinner than the first film thickness; a precharge signal corresponding to a power supply voltage is supplied to the precharge MOSFET; and an equalize signal and a selection signal corresponding to a boost voltage are supplied to the first equalize MOSFET and the selection switch MOSFET, respectively.
公开/授权文献
- US07193912B2 Semiconductor integrated circuit device 公开/授权日:2007-03-20