发明申请
- 专利标题: Extensible memory architecture and communication protocol for supporting multiple devices in low-bandwidth, asynchronous applications
- 专利标题(中): 可扩展的存储器架构和通信协议,用于在低带宽,异步应用中支持多个器件
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申请号: US11141599申请日: 2005-05-31
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公开(公告)号: US20050267729A1公开(公告)日: 2005-12-01
- 发明人: Mitchell Poplack , John Maher
- 申请人: Mitchell Poplack , John Maher
- 专利权人: Quickturn Design Systems, Inc.
- 当前专利权人: Quickturn Design Systems, Inc.
- 主分类号: G06F9/455
- IPC分类号: G06F9/455 ; G06F17/50
摘要:
A target interface system for interfacing selected components of a communication system and methods for manufacturing and using same. The target interface system includes target interface logic that is distributed among a plurality of reconfigurable logic devices. Being coupled via a serial link, the reconfigurable logic devices each have an input connection for receiving incoming data packets and an output connection for providing outgoing data packets. The serial link couples the input and output connections of successive reconfigurable logic devices to form a dataring structure for distributing the data packets among the reconfigurable logic devices. Thereby, the dataring structure maintains data synchronization among the reconfigurable logic devices such that the distribution of the target interface logic among the reconfigurable logic devices is transparent to software.