发明申请
- 专利标题: LSI design method
- 专利标题(中): LSI设计方法
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申请号: US11014814申请日: 2004-12-20
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公开(公告)号: US20050278672A1公开(公告)日: 2005-12-15
- 发明人: Toshikatsu Hosono , Takashi Yoneda
- 申请人: Toshikatsu Hosono , Takashi Yoneda
- 申请人地址: JP Kawasaki
- 专利权人: FUJITSU LIMITED
- 当前专利权人: FUJITSU LIMITED
- 当前专利权人地址: JP Kawasaki
- 优先权: JP2004-174722 20040611
- 主分类号: G06F17/50
- IPC分类号: G06F17/50 ; H01L21/82 ; H03K19/00 ; H03K19/0175
摘要:
An LSI design method according to the present invention is to estimate a timing uncertainty in an early stage of design for each item of which an influence on timing is uncertain among respective items requiring consideration relating to establishment of timing; and define a timing margin in each design stage by using the timing uncertainty estimation result depending on whether or not an influence of the each item on timing has been determined, followed by proceeding with the design in the respective design stages accordingly. As such, according to the present invention, a timing uncertainty is estimated in an early stage of LSI design, followed by proceeding with the design by using the timing uncertainty as required.
公开/授权文献
- US07257789B2 LSI design method 公开/授权日:2007-08-14
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