发明申请
- 专利标题: Method for fabricating copper-based interconnections for semiconductor device
- 专利标题(中): 制造半导体器件铜基互连的方法
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申请号: US11157862申请日: 2005-06-22
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公开(公告)号: US20060019496A1公开(公告)日: 2006-01-26
- 发明人: Takashi Onishi , Tatsuya Yasunaga , Hideo Fujii , Tetsuya Yoshikawa , Jun Munemasa
- 申请人: Takashi Onishi , Tatsuya Yasunaga , Hideo Fujii , Tetsuya Yoshikawa , Jun Munemasa
- 申请人地址: JP Kobe-shi
- 专利权人: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel,Ltd.)
- 当前专利权人: Kabushiki Kaisha Kobe Seiko Sho (Kobe Steel,Ltd.)
- 当前专利权人地址: JP Kobe-shi
- 优先权: JP2004-217761 20040726
- 主分类号: H01L21/4763
- IPC分类号: H01L21/4763 ; H01L21/44
摘要:
Cu-based interconnections are fabricated in a semiconductor device by depositing a thin film of Cu or Cu alloy on a dielectric film by sputtering, the dielectric film having trenches and/or via holes at least one groove and being arranged on or above a substrate, and carrying out high temperature and high pressure treatment to thereby embed the Cu or Cu alloy into the trenches and/or via holes, in which the sputtering is carried out at a substrate temperature of −20° C. to 0° C. using, as a sputtering gas, a gaseous mixture containing hydrogen gas and an inert gas in a ratio in percentage of 5:95 to 20:80.
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